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Makefile: remove the options target

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The Makefile used to suppress output (by using @), so this target made sense at
the time.

But the Makefile should be simple and make debugging with less abstractions or
fancy printing.  The Makefile was made verbose and doesn't hide the build
output, so remove this target.

Prompted by a question on the mailing list about the options target.
This commit is contained in:
Hiltjo Posthuma 2023-09-22 15:16:52 +02:00
parent 3a6d6d7401
commit eb3b894f40
1 changed files with 2 additions and 8 deletions
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10
Makefile
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@ -7,13 +7,7 @@ include config.mk
SRC = st.c x.c SRC = st.c x.c
OBJ = $(SRC:.c=.o) OBJ = $(SRC:.c=.o)
all: options st all: st
options:
@echo st build options:
@echo "CFLAGS = $(STCFLAGS)"
@echo "LDFLAGS = $(STLDFLAGS)"
@echo "CC = $(CC)"
config.h: config.h:
cp config.def.h config.h cp config.def.h config.h
@ -54,4 +48,4 @@ uninstall:
rm -f $(DESTDIR)$(PREFIX)/bin/st rm -f $(DESTDIR)$(PREFIX)/bin/st
rm -f $(DESTDIR)$(MANPREFIX)/man1/st.1 rm -f $(DESTDIR)$(MANPREFIX)/man1/st.1
.PHONY: all options clean dist install uninstall .PHONY: all clean dist install uninstall