2020-12-26 17:21:58 +02:00
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/* ------------------------------------------------------------------ */
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/* WARNING: relative order of tokens is important. */
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/* register */
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DEF_ASM(r0)
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DEF_ASM(r1)
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DEF_ASM(r2)
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DEF_ASM(r3)
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DEF_ASM(r4)
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DEF_ASM(r5)
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DEF_ASM(r6)
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DEF_ASM(r7)
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DEF_ASM(r8)
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DEF_ASM(r9)
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DEF_ASM(r10)
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DEF_ASM(r11) /* fp */
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DEF_ASM(r12) /* ip[c] */
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DEF_ASM(r13) /* sp */
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DEF_ASM(r14) /* lr */
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DEF_ASM(r15) /* pc */
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/* register macros */
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DEF_ASM(fp) /* alias for r11 */
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DEF_ASM(ip) /* alias for r12 */
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DEF_ASM(sp) /* alias for r13 */
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DEF_ASM(lr) /* alias for r14 */
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DEF_ASM(pc) /* alias for r15 */
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2020-12-26 17:39:31 +02:00
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#define ARM_INSTRUCTION_GROUP(tok) ((((tok) - TOK_ASM_nopeq) & 0xFFFFFFF0) + TOK_ASM_nopeq)
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/* Note: condition code is 4 bits */
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#define DEF_ASM_CONDED(x) \
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DEF(TOK_ASM_ ## x ## eq, #x "eq") \
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DEF(TOK_ASM_ ## x ## ne, #x "ne") \
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DEF(TOK_ASM_ ## x ## cs, #x "cs") \
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DEF(TOK_ASM_ ## x ## cc, #x "cc") \
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DEF(TOK_ASM_ ## x ## mi, #x "mi") \
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DEF(TOK_ASM_ ## x ## pl, #x "pl") \
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DEF(TOK_ASM_ ## x ## vs, #x "vs") \
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DEF(TOK_ASM_ ## x ## vc, #x "vc") \
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DEF(TOK_ASM_ ## x ## hi, #x "hi") \
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DEF(TOK_ASM_ ## x ## ls, #x "ls") \
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DEF(TOK_ASM_ ## x ## ge, #x "ge") \
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DEF(TOK_ASM_ ## x ## lt, #x "lt") \
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DEF(TOK_ASM_ ## x ## gt, #x "gt") \
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DEF(TOK_ASM_ ## x ## le, #x "le") \
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DEF(TOK_ASM_ ## x, #x) \
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DEF(TOK_ASM_ ## x ## rsvd, #x "rsvd")
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/* Note: add new tokens after nop (MUST always use DEF_ASM_CONDED) */
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DEF_ASM_CONDED(nop)
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2020-12-26 17:46:08 +02:00
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DEF_ASM_CONDED(wfe)
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DEF_ASM_CONDED(wfi)
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